1. Field of the Invention
This invention relates generally to a method for attaching a dielectric substrate to a semiconductor substrate and, more particularly, to a method for attaching a dielectric antenna substrate to a monolithic millimeter-wave integrated circuit (MMIC) substrate using carrier wafers or other processes for maintaining the antenna substrate substantially flat.
2. Discussion of the Related Art
Transceiver modules are known in the art that include an array of antennas each separately mounted to an antenna substrate and coupled to a transceiver front end including a plurality of antenna channels. Typically, the various amplifiers, filters, phase shifters, mixers, analog-to-digital converters, switches, etc. that are part of the front end of the transceiver module are separately fabricated as integrated circuits onto several semiconductor wafers, and then later assembled into the transceiver module using well known semiconductor assembly techniques.
It is typically difficult to mount a dielectric antenna substrate to a semiconductor substrate because the antenna substrate is made of a dielectric material and can be very thin for high frequency applications. Particularly, because the antenna substrate can be very thin and its usually flexible, it tends to curl when metal layers on both side of the substrate are patterned into the antenna patches and electrical connections.
U.S. Pat. No. 7,067,397, titled Method of Fabricating High Yield Wafer Level Packages Integrating MMIC and MEMS Components, issued Jun. 27, 2006, to Chang-Chien et al., assigned to the Assignee of this application and herein incorporated by reference, discloses a low temperature bonding process for bonding two semiconductor wafers to each other in a wafer-level packaging process.
FIG. 1 is a cross-sectional view of a wafer-level package 10 of the type disclosed in the '397 patent. The package 10 includes a semiconductor substrate wafer 12, such as an InP, GaAs, silicon, etc., and a semiconductor cover wafer 14 bonded to the substrate wafer 12 by a bonding ring 16. The bonding ring 16 defines a hermetically sealed cavity 18 in which an integrated circuit 20 fabricated on the substrate wafer 12 is sealed when the cover wafer 14 is bonded to the substrate wafer 12. The '397 patent discloses a process for sealing the cover wafer 14 to the substrate wafer 12 by bonding separate bonding rings together using a low-temperature process.